UPC8194K-EVAL【PDF 1/7 页】EVAL BOARD FOR UPC8194K

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RX-IF SiMMIC FOR W-CDMA

AGC + I/Q DEMODULATOR

UPC8194K

FEATURES

? RX-IF:

BLOCK DIAGRAM

190 MHz

? LOW POWER CONSUMPTION:

V CC = 3.0 V

? SMALL 20 PIN QFN PACKAGE:

Flat lead style for better performance

? TAPE AND REEL PACKAGING AVAILABLE

Reg. &

1/4 freq. +

Phase Shifter

Gain Control

DESCRIPTION

NEC's UPC8194K is a Silicon Microwave Monolithic inte-

grated circuit designed as a receiver (RX) section for W-

CDMA. The UPC8194K is a RX-IF IC including IF-AGC

amplifier and demodulator. This IC is suitable for kit-use for W-

APPLICATIONS

? W-CDMA

CDMA IF section.

This IC was developed using NEC's new ultra high seed

silicon bipolar process.

NEC's stringent quality assurance and test procedures en-

sure the highest reliability and perormance.

ELECTRICAL CHARACTERISTICS (unless otherwise specified, T A = 25 ° C, V CC = 3.0 V, f IF = 192.5 MHz, f LO = 760 MHz,

P LO = -15 dBm, f I/Q = 2.5 MHz)

PART NUMBER

PACKAGE OUTLINE

UPC8194K

QFN-20

SYMBOLS

I CC

V G

PARAMETERS AND CONDITIONS

Circuit Current, no input signals

power saving mode

Voltage Gain, V CONT = 2.5 V

V CONT = 0.5 V

UNITS

μ A

MIN

–

TYP

9.3

–

MAX

12.6

–

-20

IIP3

Input Third Order Intercept Point,

Gain= +65 dB,Rs = 600 ? Balanced,Pin = -76 dBm

Gain= -10 dB, Rs = 600 ? Balanced,Pin = -10 dBm

dBm

-60

-55

–

LoL

Local Leakage, leakage to I/Q port when local = 760 MHz

dBc

–

and output = 30mVp-p balanced

BW (I/Q)

V OUT(I/Q)

A E

P E

G ACC

T PS(Rise)

V PS(Rise)

V PS(fall)

G F

I/Q Bandwidth, 3 dB down

I/Q Maximum output swing, balanced ouptut

I/Q Gain Balance, fI/Q = 2.5 MHz

I/Q Phase Error, fI/Q = 2.5 MHz

Gain Accuracy, V CONT = 1 to 2 V

Rise time from power-saving mode

Rising voltage from power-saving mode

Falling voltage from power-saving mode

Gain Flatness at f IF ± 2.5 MHz

MHz

Vp-p

Deg

dB/V

–

2.2

–

? 4.6

–

? 0.5

± 3

? 6

–

0.5

? 0.5

California Eastern Laboratories

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